Eric García Arribas

About Me

I'm a computer engineering graduate interested in processors, operating systems, and embedded systems. I have previously carried out research on discovering vulnerabilities in microarchitectures, particularly in RISC-V processors.

I have completed internships at IMDEA Software Institute (advised by Marco Guarnieri) and CISPA Helmholtz Center for Information Security (advised by Michael Schwarz).

I completed my Master's degree at Universidad Politécnica de Madrid in July 2025, including a semester stay at TU Graz, Austria, where I took advanced courses in software engineering, security, virtualization, and NLP.

Hobbies: Linguistics (Phonetics, Historical Linguistics, Language Learning), Geography, and History.

Research Experience

Research Intern in Processor Fuzzing

CISPA Helmholtz Center for Information Security | Sep. 2024 – Dec. 2024

Saarbrücken, Germany | Advisor: Michael Schwarz

Adapted ETH Zurich's Cascade (a RISC-V processor fuzzer) to fuzz XuanTie's C906 and C910 RISC-V processors, running experiments on performance and bug-finding capabilities.

Research Intern in Microarchitectural Fuzzing

IMDEA Software Institute | Feb. 2023 – May 2023

Madrid, Spain | Advisor: Marco Guarnieri

Developed a RISC-V extension for Microsoft's Revizor, a microarchitectural fuzzer using Unicorn and gem5 focused on detecting speculative execution vulnerabilities.

Education

ERASMUS+ (Master's-Level Courses)

Technische Universität Graz | Feb. 2025 – Jul. 2025

Graz, Styria, Austria | Grade Avg.: 1.696 (≃ 8.7/10)

Coursework (34.5 ECTS): Side-Channel Security, Pentesting, Cloud Operating Systems, GPU Programming, Software Technology, Software Maintenance, Natural Language Processing

Master's Degree in Computer Engineering

Universidad Politécnica de Madrid | Sep. 2023 – Jul. 2025

Boadilla del Monte, Madrid, Spain | Grade Avg.: 8.55 / 10

Bachelor's Degree in Computer Engineering

Universidad Politécnica de Madrid | Sep. 2019 – Jun. 2023

Boadilla del Monte, Madrid, Spain

Publications

RISCover: Automatic Discovery of User-exploitable Architectural Security Vulnerabilities in Closed-Source RISC-V CPUs

ACM CCS 2025, Taipei, Taiwan | October 2025

Fabian Thomas, Eric García Arribas, Lorenz Hetterich, Daniel Weber, Lukas Gerlach, Ruiyi Zhang, Michael Schwarz

PDF

Master's Thesis: Analyzing the Applicability of Academic CPU Fuzzers to Real World CPUs

Universidad Politécnica de Madrid | July 2025

Bachelor's Thesis: Fuzzing RISC-V Processors for Speculative Leaks

Universidad Politécnica de Madrid | June 2023

Skills & Expertise

Programming Languages

Working Experience: Python, C, Bash scripting, Assembly (x86, RISC-V), SystemVerilog

Academic Experience: Java, C++, MATLAB, R, C#, VHDL, ADA, Prolog

Specializations

Fuzzing, Compilers, Operating Systems, Microarchitectures, Automata Theory, Data Structures, Concurrency, Intel Virtualization, Pentesting, Static & Dynamic Program Analysis

Languages

Spanish: Mother tongue

English: Cambridge Advanced C1

German: Goethe Certificate B2 (Avg. 85.75/100)

Russian: Basic proficiency (≤ B1)

Tools & Technologies

LaTeX, Git, GDB, JUnit, AWS, Buildroot, Markdown, GTKWave, JSON, SQL, XML, CSV